Verilog中已有一些建立好的邏輯門和開關的模型。在所涉及的模塊中，可通過實例引用這些門與開關模型，從而對模塊進行結構化的描述。
邏輯門:
and (output,input,...)
nand (output,input,...)
or (output,input,...)
nor (output,input,...)
xor (output,input,...)
xnor (output,input,...)
緩沖器和與非門
buf (output,...,input)
not (output,...,input)
三態門：
bufif0 (output,input,enable)
bufif1 (output,input,enable)
notif0 (output,input,enable)
notif1 (output,input,enable)
MOS開關
nmos (output,input,enable)
pmos (output,input,enable)
rnmos (output,input,enable)
rpmos (output,input,enable)
CMOS開關
cmos (output,input,Nenable,Penable)
rcmos (output,input,Nenable,Penable)
雙向開關：
tran (inout,inout2)
rtran (inout,inout2)
雙向可控開關
tranif0 (inout1,inout2,control)
tranif1 (inout1,inout2,control)
rtranif0 (inout1,inout2,control)
rtranif1 (inout1,inout2,control)
上拉源和下拉源
pullup (output)
pulldown (output)
以下為上述門電路的真值表：
其中邏輯值L和H代表部分未知值。L表示0或者Z，H表示1或者Z；
附表1 與門真值表
| and | 0 | 1 | x | z |
| 0 | 0 | 0 | 0 | 0 |
| 1 | 0 | 1 | x | x |
| x | 0 | x | x | x |
| z | 0 | x | x | x |
附表2 與非門真值表
| nand | 0 | 1 | x | z |
| 0 | 1 | 1 | 1 | 1 |
| 1 | 1 | 0 | x | x |
| x | 1 | x | x | x |
| z | 1 | x | x | x |
附表3 或門真值表
| or | 0 | 1 | x | z |
| 0 | 0 | 1 | x | x |
| 1 | 1 | 1 | 1 | 1 |
| x | x | 1 | x | x |
| z | x | 1 | x | x |
附表4 或非門真值表
| nor | 0 | 1 | x | z |
| 0 | 1 | 0 | x | x |
| 1 | 0 | 0 | 0 | 0 |
| x | x | 0 | x | x |
| z | x | 0 | x | x |
附表5 異或門真值表
| xor | 0 | 1 | x | z |
| 0 | 0 | 1 | x | x |
| 1 | 1 | 0 | x | x |
| x | x | x | x | x |
| z | x | x | x | x |
附表6 同或門真值表
| xor | 0 | 1 | x | z |
| 0 | 1 | 0 | x | x |
| 1 | 0 | 1 | x | x |
| x | x | x | x | x |
| z | x | x | x | x |
附表7 緩沖器及與非門真值表
| buf | not | |||
| Input | Output | Input | Output | |
| 0 | 0 | 0 | 1 | |
| 1 | 1 | 1 | 0 | |
| x | x | x | x | |
| z | x | z | x | |
附表8 緩沖器使能端真值表
| Bufif0 | Enable | Bufif1 | Enable | |||||||||
| 0 | 1 | x | z | 0 | 1 | x | z | |||||
| D A T A |
0 | 0 | z | L | L | D A T A |
0 | z | 0 | L | L | |
| 1 | 1 | z | H | H | 1 | z | 1 | H | H | |||
| x | x | z | x | x | x | z | x | x | x | |||
| z | x | z | x | x | z | z | x | x | x | |||
附表9 緩沖器非門使能端真值表
| notif0 | Enable | notif1 | Enable | |||||||||
| 0 | 1 | x | z | 0 | 1 | x | z | |||||
| D A T A |
0 | 1 | z | H | H | D A T A |
0 | z | 1 | H | H | |
| 1 | 0 | z | L | L | 1 | z | 0 | L | L | |||
| x | x | z | x | x | x | z | x | x | x | |||
| z | x | z | x | x | z | z | x | x | x | |||
附表10 MOS型控制端真值表
| Pmos Rpmos |
Control | Nmos Rnmos |
Control | |||||||||
| 0 | 1 | x | z | 0 | 1 | x | z | |||||
| D A T A |
0 | 0 | z | L | L | D A T A |
0 | z | 0 | L | L | |
| 1 | 1 | z | H | H | 1 | z | 1 | H | H | |||
| x | x | z | x | x | x | z | x | x | x | |||
| z | z | z | z | z | z | z | z | z | z | |||
規則：
1）緩沖門、非門都可以有多個輸出，但是這些輸出值都是相同的。
2）當nmos，pmos，cmos, tran, tranif0, tranif1類型的開關開啟時，信號從輸入到輸出並不改變其強度。
3）當有電阻的開關，如rnmos, rpmos, rcmos, rtran, rtranif0, rtranif1類型的開關，開啟式，信號從輸入到輸出會改變其強度。
| Strength | 減至 |
| supply | pull |
| strong | pull |
| pull | weak |
| large | medium |
| weak | medium |
| medium | small |
| small | small |
| highz | highz |