USB2.0是向下兼容USB1.X的，即USB2.0支持高速，全速，低速的USB設備
（HIGH-SPEED,FULL-SPEED,LOW-SPEED），而USB1.X不支持高速設備。
因此如果高速設備接在USB1.X的hub上，也只能工作在全速狀態。
因此對速度的識別是很重要的，否則沒辦法以想要的速度通信。
**************************************************************************************
全速和低速區分
根據規范，全速和低速很好區分。因為在設備端有一個1.5K的上拉電阻，
上電后，有上拉電阻的那根數據線會被拉高，
根據 D+或D-的電平狀態來檢測是全速還是低速設備。
全速，高速的識別比較簡單，但是USB2.0，USB1.X只有一對數據線，
就沒辦法有第三種狀態來表示高速設備了，所以高速設備的識別稍微復雜。
**************************************************************************************
高速設備是以一個全速設備的身份出現的，即和全速設備一樣，高速設備也在D+端有一個1.5K的上拉電阻。
USB2.0的HUB把設備當成一個全速設備，然后進行一系列的握手信號來確認雙方的身份，
一方面HUB要檢測設備是高速還是全速，另一方面設備也要檢測HUB是USB2.0還是USB1.X的，
如果HUB是USB2.0,設備也是高速的 就工作在高速模式，否則只能工作在全速模式。
HUB連接到設備或上電時，向主機報告，主機通過發送Set_port_feature請求讓hub復位新插入的設備。
設備復位操作是驅動數據線到復位SE0（D+,D-都為低電平），並持續至少10MS。
高速設備復位后，通過內部的電流源向D-持續灌17.78MA大小的電流。
因為此時D+端的1.5K上拉電阻還沒撤銷，在hub端，全速/低速驅動器形成一個45歐姆的終端電阻，
兩電阻並聯約形成45歐姆的阻抗，所以在HUB端可以看到一個 800ma（17.78*45）的電壓，
這個就是Chirp K信號。Chirp K 的持續時間是 1ms - 7ms.
在HUB端，雖然下達了復位信號，並一直驅動着SE0，但usb2.0的高速接收器一直在檢測 Chirp K信號，
如果沒有檢測到，就繼續復位操作，直到復位結束，然后就工作在全速狀態。
如果只是一個全速的hub，不支持高速設備，那么hub也不會理會Chirp k信號，之后設備也不會切換到高速模式。
如果是高速 HUB，設備在發送的Chirp k信號結束后的100us內，HUB必須回復一連串的KJKJKJ........序列，
向設備表明這是一個usb2.0的hub，這里的kj序列式連續的，且不能中斷，每個K或J的持續時間是 40us--60us.
再回到設備端，設備檢測到6個hub發送的 Chirp信號（3對KJ）后，它必須在500us內切換到高速模式。
切換動作有：
1.斷開1.5K的上拉電阻
2. 連接D+/D-上的高速終端電阻（high-speed termination），其實就是全速/低速差分驅動器。
3.進入默認的高速狀態
執行完 1,2兩步后，USB信號線上看的到現象就發生變化了：
HUB發動的 Chirp降到原來的一半，400mv。
這是因為設備端掛載新的終端電阻后，並聯原來的終端電阻，結果為22.5歐姆，
17.78*22.5為 400mv，以后高速設備操作的 信號幅值就是 400mv而不是 全速/低速的 3.3V。
至此高速設備與usb2.0握手完畢，開始進行480Mbps的通信。
**************************************************************************************
高速設備的連接檢測剛開始是在全速信號環境下進行的。
通過高速設備和高速集線器之間傳輸一個握手信號來指示設備是否為高速設備。
如果握手信號傳輸失敗，則默認為全速設備。
設備連接到集線器Hub或主機時，全速和高速設備在D+線上有一個1.5KΩ的上拉電阻，
由於下拉電阻為15KΩ，D+會加到近似 90％的直流電平，
當集線器探測到D+的高電平，就認為連接到全速設備。
此時，軟件就會通過復位命令發送一個RESET信號到集線器，
讓集線器驅動一個 SE0信號（D+和D－都為低電平）超過10ms。
高速設備檢測到RESET信號后發送一個Chirp K信號給集線器（1～7ms的時間）。
集線器的高速接收器若在設備發出Chirp K序列后2.5微秒內檢測到，
則響應傳送一個交替的Chirp K和Chirp J信號序列。
設備檢測到這6個線性調頻脈沖Chirp序列（3個交替的KJ信號對），
集線器將連接端口置入高速啟用狀態，並從D+斷開上拉電阻，
啟用高速設備終端，設置高速設備默認狀態。
**************************************************************************************
Data Transmission
The data rate achieved by High Speed is 480 Mb/s.
This needs to be transmitted down cables which were originally specified for a 12 Mb/s transmission rate,
To achieve this, when the link is conveying high speed data, each end of D+ and each end of D- is
terminated with a 45 Ohm resistance to ground.
Data is sent by steering a current of 17.78 mA (derived from the positive supply) : 17.78*22.5 = 400mv
into either the D+ or the D- line. This results in a voltage of 400mV on the line being fed with current.
The differential state of the line is detected at the receiving end by a differential receiver.
This arrangement is able to reliably receive data sent at 480 Mb/s.
In fact the 45 Ohm resistors are provided by the Full Speed / Low Speed driver,
at each end of the link, applying a Single Ended Zero.
The FS/LS driver is designed to provide as accurate a termination resistance as possible.
By switching off the high speed transceiver current source, the line conditions are as defined for full speed / low speed.
In addition to the differential receiver, there is also a 'transmission envelope detector' and a 'differential envelope detector'.
The transmission envelope detector produces a 'squelch' signal if there is less than 100uV between the data lines,
which means that there is no data being received.
The differential envelope detector detects if the far end has been unplugged,
as the differential voltage will double to about 800 mV if the far end terminating resistors are not present.
(Further down the page you will see how this is used by the host to detect the unplugging of a high speed device.)
Negotiating High Speed
To maintain the required compatibility, a high speed device will always present itself
initially as a Full Speed device (by a 1.5K pullup resistor on D+).
The negotiation for High Speed takes place during the Reset, which is, as we remember,
the first thing a host must do to a device before attempting data communication.
The high speed detection handshake is initiated by the device.
The hub will respond to it, if it is high speed capable.
What the device does
The device leaves its D+ 1.5K pullup resistor connected,
and does not terminate the lines with 45 Ohm resistors as it would for high speed.
But it drives high speed current (17.78mA) into the D- line for at least a millisecond.
Now, remember that the hub is applying a reset condition to the lines,
so effectively is already terminated as for high speed data.
As only one end of the link is terminated, the hub will see about 800 mV on D-.
This condition is called a K-chirp.
A full / low speed hub will pay no attention to this condition,
but a high speed hub will detect it using its differential receiver and the absence of a squelch signal.
If the hub does not respond, then the rest of the reset,
and subsequent data transmissions will take place as is normal for a full speed device.
Hub Response
If the hub is high speed capable then it will monitor the K-chirp from the device until it sees it completing.
It must, within 100us, send a series of K-J chirp pairs to the device.
This means that it will inject 17.78 mA alternately into the D- and the D+ lines.
Each of these chirps lasts around 50us, and there are no gaps between them.
The device has to see at least 3 chirp pairs before assuming that the hub is high speed capable.
Switching to High Speed
At this point the device disconnects its 1.5K pullup resistor,
applies the 45 Ohm high speed terminations (using its full speed data driver in SE0 mode),
and is thus in a state to perform high speed data transmission and reception.
The hub will continue to send chirp pairs up until 100 - 500 us before the end of reset,
and the device will monitor these chirps.
At the point in time when the device termination is applied,
the amplitude of the chirp signals, viewed on an oscilloscope would be seen to halve in amplitude from 800mV to 400mV.