quartus報錯 Error (10054): Verilog HDL File I/O error at sdram_ctrl_tb.v(6): can't open Verilog Design File "Sdram_params.h" - 碼上歡樂

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quartus報錯 Error (10054): Verilog HDL File I/O error at sdram_ctrl_tb.v(6): can't open Verilog Design File "Sdram_params.h"

本文轉載自查看原文 2020-07-30 16:11 701 fpga

解決方法：包含完整路徑。

比如我一開始是：`include "Sdram_params.h"

錯誤（改為：`include "F:\FPGA\exce\uart2sdram2vga\rtl\Sdram_params.h"就ok了。）

修改：`include "../rtl/Sdram_params.h"

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