由於要使用IP軟核Microblaze的SPI接口驅動DDS芯片AD9833，系統自帶SPI接口程序實在太亂了，使用的AX309開發板，開發板例程SPI接口是FLASH讀寫，改起來也很費勁，所以干脆自己根據Microblaze手冊編寫SPI驅動。
程序為SPI連接兩個AD9833芯片，通過Microblaze中的SPI從設備寄存器SPISSR設置從設備。程序如下圖：
1 #include "xspi.h" 2 #include "xspi_l.h" 3 #include "ad9833.h" 4 #include "xparameters.h" 5 #include "xgpio.h" 6 7 8 #define Triangle_Wave 0x0002 9 #define Sin_Wave 0x0000 10 #define MSB_Wave 0x0028 11 #define MSB_Wave_Half 0x0020 12 #define AD9833_freq_k 10.73741824f 13 14 void ad9833_init (void) 15 { 16 XSpi_WriteReg(XPAR_SPI_0_BASEADDR, XSP_CR_OFFSET, XSP_CR_ENABLE_MASK |XSP_CR_MASTER_MODE_MASK |XSP_CR_CLK_POLARITY_MASK); 17 XSpi_WriteReg(XPAR_SPI_0_BASEADDR, XSP_SSR_OFFSET, 0X00000002); 18 XSpi_WriteReg(XPAR_SPI_0_BASEADDR, XSP_DTR_OFFSET, 0x0100); //復位 19 XSpi_WriteReg(XPAR_SPI_0_BASEADDR, XSP_DTR_OFFSET, 0x2100); //B28、RESET為1，FSELECT =0；PSELECT =0； 20 XSpi_WriteReg(XPAR_SPI_0_BASEADDR, XSP_DTR_OFFSET, 0x4000); // 頻率寄存器低14位 21 XSpi_WriteReg(XPAR_SPI_0_BASEADDR, XSP_DTR_OFFSET, 0x4000); //頻率寄存器高14位 22 XSpi_WriteReg(XPAR_SPI_0_BASEADDR, XSP_DTR_OFFSET, 0xC000); //相位 23 XSpi_WriteReg(XPAR_SPI_0_BASEADDR, XSP_DTR_OFFSET, 0x2000); 24 25 XSpi_WriteReg(XPAR_SPI_0_BASEADDR, XSP_SSR_OFFSET, 0X00000001); 26 27 XSpi_WriteReg(XPAR_SPI_0_BASEADDR, XSP_DTR_OFFSET, 0x0100); //復位 28 XSpi_WriteReg(XPAR_SPI_0_BASEADDR, XSP_DTR_OFFSET, 0x2100); //B28、RESET 為1，FSELECT =0；PSELECT =0； 29 XSpi_WriteReg(XPAR_SPI_0_BASEADDR, XSP_DTR_OFFSET, 0x4000); // 頻率寄存器低14位 30 XSpi_WriteReg(XPAR_SPI_0_BASEADDR, XSP_DTR_OFFSET, 0x4000); //頻率寄存器高14位 31 XSpi_WriteReg(XPAR_SPI_0_BASEADDR, XSP_DTR_OFFSET, 0xC000); //相位 32 XSpi_WriteReg(XPAR_SPI_0_BASEADDR, XSP_DTR_OFFSET, 0x2000); 33 34 } 35 36 void ad9833_FreqSet(u32 freq) // HZ 37 { 38 u16 Freq_L = 0; 39 u16 Freq_H = 0; //正弦頻率 40 float temp =0.0; 41 u32 freq_str =0; 42 43 u16 Freq_Tri_L = 0; 44 u16 Freq_Tri_H = 0; //觸發信號頻率 45 u32 Freq_Tri_str =0; 46 temp = freq * AD9833_freq_k; 47 freq_str =(u32)temp; 48 freq_str = freq_str << 2; 49 Freq_L = (u16)(freq_str & 0xFFFF); 50 Freq_L = Freq_L >>2; 51 Freq_L = Freq_L & 0x3FFF; 52 Freq_L = Freq_L | 0x4000; 53 54 Freq_H = (u16)((freq_str & 0xFFFF0000) >>16); 55 Freq_H = Freq_H & 0x3FFF; 56 Freq_H = Freq_H | 0x4000; 57 58 /////////////////////////////////////////////////// 59 Freq_Tri_str = freq_str <<4; 60 Freq_Tri_L = (u16)(Freq_Tri_str & 0xFFFF); 61 Freq_Tri_L = Freq_Tri_L >>2; 62 Freq_Tri_L = Freq_Tri_L & 0x3FFF; 63 Freq_Tri_L = Freq_Tri_L | 0x4000; 64 65 Freq_Tri_H = (u16)((Freq_Tri_str & 0xFFFF0000) >>16); 66 Freq_Tri_H = Freq_Tri_H & 0x3FFF; 67 Freq_Tri_H = Freq_Tri_H | 0x4000; 68 69 XSpi_WriteReg(XPAR_SPI_0_BASEADDR, XSP_SSR_OFFSET, 0X00000002); 70 XSpi_WriteReg(XPAR_SPI_0_BASEADDR, XSP_DTR_OFFSET, 0x2000 |Sin_Wave); //B28、RESET 為1，FSELECT =0；PSELECT =0； 71 XSpi_WriteReg(XPAR_SPI_0_BASEADDR, XSP_DTR_OFFSET, Freq_L); // 頻率寄存器低14位 72 XSpi_WriteReg(XPAR_SPI_0_BASEADDR, XSP_DTR_OFFSET, Freq_H); // 頻率寄存器高14位 73 delay(1); 74 XSpi_WriteReg(XPAR_SPI_0_BASEADDR, XSP_SSR_OFFSET, 0X00000001); 75 XSpi_WriteReg(XPAR_SPI_0_BASEADDR, XSP_DTR_OFFSET, 0x2000 |MSB_Wave); //B28、RESET 為1，FSELECT =0；PSELECT =0； 76 XSpi_WriteReg(XPAR_SPI_0_BASEADDR, XSP_DTR_OFFSET, Freq_Tri_L); // 頻率寄存器低14位 77 XSpi_WriteReg(XPAR_SPI_0_BASEADDR, XSP_DTR_OFFSET, Freq_Tri_H); // 頻率寄存器高14位 78 }