參考網址
https://github.com/espressif/esp-iot-solution/tree/master/examples/eth2wifi
RMII PHY Wiring（RMII接口物理層連接）：
物理層地址：
關鍵點：
Because GPIO0 is a strapping pin for entering UART flashing mode on reset, care must be taken when also using this pin as EMAC_TX_CLK. If the clock output from the PHY is oscillating during reset, the ESP32 may randomly enter UART flashing mode. One solution is to use an additional GPIO as a "power pin", which either powers the PHY on/off or enables/disables the PHY's own oscillator. This prevents the clock signal from being active during a system reset. For this configuration to work, GPIO0 also needs a pullup resistor and the "power pin" GPIO will need a pullup/pulldown resistor - as appropriate in order to keep the PHY clock disabled when the ESP32 is in reset. See the example source code to see how the "power pin" GPIO can be managed in software. The example defaults to using GPIO 17 for this function, but it can be overriden. On Espressif's Ethernet development board, GPIO 17 is the power pin used to enable/disable the PHY oscillator.
翻譯： 要實現這個功能要外接50Mhz的晶振作為參考時鍾，連接的是GPIO0，但是這個腳也是用作配置flash下載模式的，所以再在ESP32中引腳中選出一個引腳用於打開和關閉外部的晶振（本例子采用的是GPIO17）。（這里就使用有源晶振 ）（STM32使用的是無源晶振+匹配電容）