STM8S時鍾配置CLK_HSIPrescalerConfig與CLK_SYSCLKConfig區別


STM8S的時鍾配置通過:CLK_CKDIVR寄存器,而CLK_CKDIVR一個是配置HSI分頻,另一個是配置CPU的分頻

 

static void CLK_Config(void)
{
CLK_DeInit();

/* Clock divider to HSI/1 */
CLK_HSIPrescalerConfig(CLK_PRESCALER_HSIDIV1);  // 只配置HSI分頻率,CPU分頻率1   

/* Output Fcpu on CLK_CCO pin */
CLK_CCOConfig(CLK_OUTPUT_MASTER);
}

 


/**
* @brief Configure system clock to run at Maximum clock speed and output the
* system clock on CCO pin
* @param None
* @retval None
*/
static void CLK_Config(void)
{
ErrorStatus status = FALSE;

CLK_DeInit();

/* Configure the Fcpu to DIV1*/
CLK_SYSCLKConfig(CLK_PRESCALER_CPUDIV1);   // 配置CPU分頻

/* Configure the HSI prescaler to the optimal value */
CLK_SYSCLKConfig(CLK_PRESCALER_HSIDIV1);  // 配置HSI分頻

/* Output Fcpu on CLK_CCO pin */
CLK_CCOConfig(CLK_OUTPUT_CPU);

/* Configure the system clock to use HSE clock source and to run at 24Mhz */
status = CLK_ClockSwitchConfig(CLK_SWITCHMODE_AUTO, CLK_SOURCE_HSE, DISABLE, CLK_CURRENTCLOCKSTATE_DISABLE);

while (ButtonPressed == FALSE)
{
}
/* Configure the system clock to use HSI clock source and to run at 16Mhz */
status = CLK_ClockSwitchConfig(CLK_SWITCHMODE_AUTO, CLK_SOURCE_HSI, DISABLE, CLK_CURRENTCLOCKSTATE_DISABLE);
}

 

 

 

// CLK_SYSCLKConfig通過CLK_Prescaler值的最高位來區分是配置HSI分頻,還是CPU分頻的。這個函數有兩個功能。而CLK_HSIPrescalerConfig是直接配置HSI分頻的,CPU分頻配置成1

void CLK_SYSCLKConfig(CLK_Prescaler_TypeDef CLK_Prescaler)
{
/* check the parameters */
assert_param(IS_CLK_PRESCALER_OK(CLK_Prescaler));

if (((uint8_t)CLK_Prescaler & (uint8_t)0x80) == 0x00) /* Bit7 = 0 means HSI divider */
{
CLK->CKDIVR &= (uint8_t)(~CLK_CKDIVR_HSIDIV);
CLK->CKDIVR |= (uint8_t)((uint8_t)CLK_Prescaler & (uint8_t)CLK_CKDIVR_HSIDIV);
}
else /* Bit7 = 1 means CPU divider */
{
CLK->CKDIVR &= (uint8_t)(~CLK_CKDIVR_CPUDIV);
CLK->CKDIVR |= (uint8_t)((uint8_t)CLK_Prescaler & (uint8_t)CLK_CKDIVR_CPUDIV);
}
}

 


免責聲明!

本站轉載的文章為個人學習借鑒使用,本站對版權不負任何法律責任。如果侵犯了您的隱私權益,請聯系本站郵箱yoyou2525@163.com刪除。



 
粵ICP備18138465號   © 2018-2025 CODEPRJ.COM