verilog語法：數組切片

【轉載】https://www.thinbug.com/q/41484219

使用數組切片構造。您可以在Array slicing Q&A

找到更詳細的說明

bit [7:0] PA, PB;
int loc;

initial begin
  loc = 3;
  PA = PB;                      // Read/Write
  PA[7:4] = 'hA;                // Read/Write of a slice
  PA[loc -:4] = PA[loc+1 +:4];  // Read/Write of a variable slice equivalent to PA[3:0] = PA[7:4];
end

Verilog 2001語法

[M -: N]  // negative offset from bit index M, N bit result 
[M +: N]  // positive offset from bit index M, N bit result