參考文章：Optimizing Transient Response of Internally Compensated dc-dc Converters With Feedforward Capacitor，http://www.ti.com.cn/cn/lit/an/slva289b/slva289b.pdf
翻譯文章：優化帶前饋電容的內置補償 DC-DC轉換器的瞬態響應，http://www.ti.com.cn/cn/lit/an/zhca058/zhca058.pdf
1. 基本原理
在內部補償的converter的FB網絡增加前饋電容，可調節控制環穿越頻率和相位裕度，提升控制性能。
計算公式：可以參考文章：Evaluation and Performance Optimization of Fully Integrated DC-DC Converter.pdf
零點頻率：
極點頻率：
未補償之前的波特圖：
補償之后的波特圖：
To optimize transient response, a Cff value is chosen such that the gain and phase boost of the feedback increases the bandwidth of the converter, while still maintaining an acceptable phase margin. . In general, larger values of Cff provide greater bandwidth improvements. However, if Cff is too large, the feedforward capacitor causes the loop gain to crossover too high in frequency and the Cff phase boost contribution is insufficient, resulting in unacceptable phase margin or instability.
Cff的目的是提升反饋回路的增益和相位，同時保持可接受的相位裕度。
2. 如何計算前饋電容
首先是補償頻率的選擇。這里采用一種近似的方法，將補償之后的頻率設置為等於fz和fp的幾何平均數，即fz和fp對數域的平均頻率，參考下方公式3、4。在幾何平均頻率處，Cff電容帶來的相位提升最大(The geometric mean frequency equation is used to calculate the frequency where the phase boost from the zero and pole is at a maximum.)
把幾何平均頻率選擇在沒有Cff電容時的穿越頻率(Setting the geometric mean frequency equal to the converter crossover frequency with no Cff positions the maximum phase boost of Cff at f_nocff. )。但是由於Cff電容會同時提升相位和增益，新的穿越頻率會比幾何平均頻率大(However, because Cff introduces a boost in phase and in gain, the new crossover frequency occurs at a frequency greater than the geometric mean frequency.)。按照上述公式（6）即可計算出最優化的前饋電容。最優化指的是，在穿越頻率和相位裕度之間折中達到最優。
3. 更進一步，如何根據需求選擇前饋電容
前饋電容選取大於計算的電容，會導致穿越頻率更高(響應速度更快)，但是相位裕度會減小。如果選取小一些，穿越頻率會低一些，當相位裕度會大一些。需要根據實際情況選取，並用測試驗證。
For most applications, this is an optimum placement of the feedforward capacitor response. Increasing the feedforward capacitance value pushes both the zero and pole frequencies closer to the origin which increases the crossover frequency but can result in lower overall phase margin. This corresponds to a faster loop at the expense of lower phase margin. Decreasing the Cff value results in the opposite result until a certain point where the feedforward capacitor gain and phase boost contribution diminishes and approaches the response of having no Cff. Having too small a Cff value injects a zero and pole at frequencies too high and effectively too late in loop response, resulting in little or no performance improvement.
