根據nxp原廠uboot移植


1.首先拿到一個原廠uboot,先編譯一下;查找根目錄下config目錄里自己需要的配置文件,通過在根目錄新建如下腳本imx_emmc.sh后,執行 ./imx_emmc.sh后完成編譯工作

#!/bin/bash
make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- distclean
make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- mx6ull_14x14_evk_emmc_defconfig
make V=1 ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- -j8

2.把編譯得到的uboot.bin燒進板子就可以看到那些部分是支持,那些是不支持的,不支持的就需要我們的移植工作了;既然如此,那就新建一套自己板子的uboot,感受一下一整套流程

2.1:添加配置文件

cd configs

cp mx6ull_14x14_evk_emmc_defconfig mx6ull_alientek_emmc_defconfig
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6ull_alientek_emmc/imximage.cfg,MX6ULL_EVK_EMMC_REWORK"
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_TARGET_MX6ULL_ALIENTEK_EMMC=y
CONFIG_CMD_GPIO=y

2.2:添加頭文件

cd include/configs
cp mx6ullevk.h mx6ull_alientek_emmc.h
記得修改預處理,這個頭文件的主要內容就是配置或者裁剪 uboot
 
2.3:添加板級文件夾
cd board/freescale/
cp mx6ullevk/ -r mx6ull_alientek_emmc

cd mx6ull_alientek_emmc
mv mx6ullevk.c mx6ull_alientek_emmc.c

2.3.1:修改Makefile

# (C) Copyright 2015 Freescale Semiconductor, Inc.
#
# SPDX-License-Identifier:	GPL-2.0+
#

obj-y  := mx6ull_alientek_emmc.o

extra-$(CONFIG_USE_PLUGIN) :=  plugin.bin
$(obj)/plugin.bin: $(obj)/plugin.o
	$(OBJCOPY) -O binary --gap-fill 0xff $< $@

2.3.2:修改imximage.cfg

PLUGIN	board/freescale/mx6ull_alientek_emmc/plugin.bin 0x00907000

2.3.3:修改Kconfig

if TARGET_MX6ULL_ALIENTEK_EMMC

config SYS_BOARD
	default "mx6ull_alientek_emmc"

config SYS_VENDOR
	default "freescale"

config SYS_CONFIG_NAME
	default "mx6ull_alientek_emmc"

endif

2.3.4:修改 MAINTAINERS

MX6ULL_ALIENTEK_EMMC BOARD
M:	Peng Fan <peng.fan@nxp.com>
S:	Maintained
F:	board/freescale/mx6ull_alientek_emmc/
F:	include/configs/mx6ull_alientek_emmc.h

2.4:修改uboot圖形界面配置文件:arch/arm/cpu/armv7/mx6/Kconfig

config TARGET_MX6ULL_ALIENTEK_EMMC
	bool "Support mx6ull_alientek_emmc"
	select MX6ULL
	select DM
	select DM_THERMAL

。。。。

source "board/freescale/mx6ull_alientek_emmc/Kconfig"

2.5:新建腳本編譯新建的uboot

#!/bin/bash
make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- distclean
make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- mx6ull_alientek_emmc_defconfig
make V=1 ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- -j8

2.6:修改lcd驅動,(1)檢查gpio引腳;(2)檢查lcd信息結構體參數(lcd控制器需要設置的參數)

2.6.1:一般驅動的配置都在xxx.h與.c文件中,在mx6ull_alientek_emmc.c中修改如下(board_init_r > init_sequence_r > stdio_add_devices > drv_video_init > board_video_skip > displays[])

struct display_info_t const displays[] = {{
	.bus = MX6UL_LCDIF1_BASE_ADDR,
	.addr = 0,
	.pixfmt = 24,
	.detect = NULL,
	.enable	= do_enable_parallel_lcd,
	.mode	= {
		.name			= "TFT7016",
		.xres           = 480,
		.yres           = 272,
		.pixclock       = 19531,
		.left_margin    = 140,
		.right_margin   = 160,
		.upper_margin   = 20,
		.lower_margin   = 12,
		.hsync_len      = 20,
		.vsync_len      = 3,
		.sync           = 0,
		.vmode          = FB_VMODE_NONINTERLACED
} } };

2.6.2:在mx6ull_alientek_emmc.h文件中修改如下:

"panel=TFT7016\0"

2.7:網絡驅動修改,看原理圖可知,網絡信號通過以太網接口,傳給phy芯片處理后,再交給ENET1/2控制器處理;imx的ENET_MDIO通過不同的器件地址來訪問某個phy芯片;開發板 ENET1 上連接的LAN8720A器件地址為 0X0,所示我們要修改 ENET1 網絡驅動;(1)ENET1 復位引腳初始化。(2)LAN8720A 的器件 ID。(3)LAN8720 驅動。      ENET2同理

2.7.1:在mx6ull_alientek_emmc.c中修改地址

#define CONFIG_CMD_NET
#ifdef CONFIG_CMD_NET #define CONFIG_CMD_PING #define CONFIG_CMD_DHCP #define CONFIG_CMD_MII #define CONFIG_FEC_MXC #define CONFIG_MII #define CONFIG_FEC_ENET_DEV 1 #if (CONFIG_FEC_ENET_DEV == 0) #define IMX_FEC_BASE ENET_BASE_ADDR #define CONFIG_FEC_MXC_PHYADDR 0x1 #define CONFIG_FEC_XCV_TYPE RMII #elif (CONFIG_FEC_ENET_DEV == 1) #define IMX_FEC_BASE ENET2_BASE_ADDR #define CONFIG_FEC_MXC_PHYADDR 0x0 #define CONFIG_FEC_XCV_TYPE RMII #endif #define CONFIG_ETHPRIME "FEC" #define CONFIG_PHYLIB #define CONFIG_PHY_SMSC //產品公司名稱 #endif

2.7.2:在mx6ull_alientek_emmc.c中刪除掉74LV595 的驅動代碼;復位引腳修增加如下

#define ENET1_RESET IMX_GPIO_NR(5, 7)
#define ENET2_RESET IMX_GPIO_NR(5, 8)

2.7.3:在mx6ull_alientek_emmc.c中添加復位引腳驅動

static iomux_v3_cfg_t const fec1_pads[] = {
	MX6_PAD_GPIO1_IO06__ENET1_MDIO | MUX_PAD_CTRL(MDIO_PAD_CTRL),
	MX6_PAD_GPIO1_IO07__ENET1_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL),
	MX6_PAD_ENET1_TX_DATA0__ENET1_TDATA00 | MUX_PAD_CTRL(ENET_PAD_CTRL),
	MX6_PAD_ENET1_TX_DATA1__ENET1_TDATA01 | MUX_PAD_CTRL(ENET_PAD_CTRL),
	MX6_PAD_ENET1_TX_EN__ENET1_TX_EN | MUX_PAD_CTRL(ENET_PAD_CTRL),
	MX6_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 | MUX_PAD_CTRL(ENET_CLK_PAD_CTRL),
	MX6_PAD_ENET1_RX_DATA0__ENET1_RDATA00 | MUX_PAD_CTRL(ENET_PAD_CTRL),
	MX6_PAD_ENET1_RX_DATA1__ENET1_RDATA01 | MUX_PAD_CTRL(ENET_PAD_CTRL),
	MX6_PAD_ENET1_RX_ER__ENET1_RX_ER | MUX_PAD_CTRL(ENET_PAD_CTRL),
	MX6_PAD_ENET1_RX_EN__ENET1_RX_EN | MUX_PAD_CTRL(ENET_PAD_CTRL),
	MX6_PAD_SNVS_TAMPER7__GPIO5_IO07 | MUX_PAD_CTRL(NO_PAD_CTRL),
};

static iomux_v3_cfg_t const fec2_pads[] = {
	MX6_PAD_GPIO1_IO06__ENET2_MDIO | MUX_PAD_CTRL(MDIO_PAD_CTRL),
	MX6_PAD_GPIO1_IO07__ENET2_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL),

	MX6_PAD_ENET2_TX_DATA0__ENET2_TDATA00 | MUX_PAD_CTRL(ENET_PAD_CTRL),
	MX6_PAD_ENET2_TX_DATA1__ENET2_TDATA01 | MUX_PAD_CTRL(ENET_PAD_CTRL),
	MX6_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 | MUX_PAD_CTRL(ENET_CLK_PAD_CTRL),
	MX6_PAD_ENET2_TX_EN__ENET2_TX_EN | MUX_PAD_CTRL(ENET_PAD_CTRL),

	MX6_PAD_ENET2_RX_DATA0__ENET2_RDATA00 | MUX_PAD_CTRL(ENET_PAD_CTRL),
	MX6_PAD_ENET2_RX_DATA1__ENET2_RDATA01 | MUX_PAD_CTRL(ENET_PAD_CTRL),
	MX6_PAD_ENET2_RX_EN__ENET2_RX_EN | MUX_PAD_CTRL(ENET_PAD_CTRL),
	MX6_PAD_ENET2_RX_ER__ENET2_RX_ER | MUX_PAD_CTRL(ENET_PAD_CTRL),
	MX6_PAD_SNVS_TAMPER8__GPIO5_IO08 | MUX_PAD_CTRL(NO_PAD_CTRL),
};
static void setup_iomux_fec(int fec_id)
{
	if (fec_id == 0)
	{
		imx_iomux_v3_setup_multiple_pads(fec1_pads,
						 ARRAY_SIZE(fec1_pads));
		gpio_direction_output(ENET1_RESET, 1);
		gpio_set_value(ENET1_RESET, 0);
		mdelay(20);
		gpio_set_value(ENET1_RESET, 1);
	}
	else
	{
		imx_iomux_v3_setup_multiple_pads(fec2_pads,
						 ARRAY_SIZE(fec2_pads));
		gpio_direction_output(ENET2_RESET, 1);
		gpio_set_value(ENET2_RESET, 0);
		mdelay(20);
		gpio_set_value(ENET2_RESET, 1);
	}
}

2.7.4:修改 drivers/net/phy/phy.c 文件中的函數 genphy_update_link,添加如下代碼段

	#ifdef CONFIG_PHY_SMSC
	static int lan8720_flag = 0;
	int bmcr_reg = 0;
	if (lan8720_flag == 0) {
	bmcr_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR); 
	phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, BMCR_RESET); 
	while(phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR) & 0X8000) {
	udelay(100); 
	}
	phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, bmcr_reg); 
	lan8720_flag = 1;
	}
	#endif

 

 


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