ERROR:Place:1108 - A clock IOB / BUFGMUX clock component pair have been found
that are not placed at an optimal clock IOB / BUFGMUX site pair. The clock
IOB component <Clk_125M> is placed at site <PAD99>. The corresponding BUFG
component <U_Clk_ctrl/U_2_CLK_SWITCH/U_BUFGMUX> is placed at site
<BUFGMUX_X2Y12>. There is only a select set of IOBs that can use the fast
path to the Clocker buffer, and they are not being used. You may want to
analyze why this problem exists and correct it. If this sub optimal condition
is acceptable for this design, you may use the CLOCK_DEDICATED_ROUTE
constraint in the .ucf file to demote this message to a WARNING and allow
your design to continue. However, the use of this override is highly
discouraged as it may lead to very poor timing results. It is recommended
that this error condition be corrected in the design. A list of all the
COMP.PINs used in this clock placement rule is listed below. These examples
can be used directly in the .ucf file to override this clock rule.
< NET "Clk_125M" CLOCK_DEDICATED_ROUTE = FALSE; >
你在你引腳聲明的下面加上這句話 NET "cp" CLOCK_DEDICATED_ROUTE = FALSE; 因為這是時序約束造成的。
最后的樣子是下面：
NET "i_clk" CLOCK_DEDICATED_ROUTE = FALSE;
NET "i_clk" LOC = B18;
ISE編譯時遇到的錯誤，網上也有很多此類的說明
ERROR:Place:1018 - A clock IOB / clock component pair have been found that are not placed at an optimal clock IOB /
clock site pair. The clock component <in_BUFGP/BUFG> is placed at site <BUFGMUX_X2Y10>. The IO component <in> is
placed at site <PAD60>. This will not allow the use of the fast path between the IO and the Clock buffer. If this
sub optimal condition is acceptable for this design, you may use the CLOCK_DEDICATED_ROUTE constraint in the .ucf
file to demote this message to a WARNING and allow your design to continue. However, the use of this override is
highly discouraged as it may lead to very poor timing results. It is recommended that this error condition be
corrected in the design. A list of all the COMP.PINs used in this clock placement rule is listed below. These
examples can be used directly in the .ucf file to override this clock rule.
< NET "in" CLOCK_DEDICATED_ROUTE = FALSE; >
該錯誤在舊版本的ise中可以通過添加環境變量的方法來忽略，在ise12中可以在ucf文件中添加：
NET "in" CLOCK_DEDICATED_ROUTE = FALSE;
來忽略此錯誤，錯誤形成的原因可能為：
布板的時候時鍾接到了fpga差分時鍾的N腳了，單端時鍾一定要接到P腳，這樣才能使用全局時鍾布線資源，保證時鍾性能。