用到ESP8266的HSPI 做从设备
先看看双线的协议（其实这里所谓的双线，只是自己给他加上去而已）
命令格式
命令+地址+32字节数据
命令：02 从机接收数据 03 主机读取从机的数据
地址默认一直 0
所以就是：
写数据：02+00 +32字节数据
读数据：03+00+32字节数据（写0吧）
网上直接拉 NONOSDK2.2.0
ESP8266_NONOS_SDK-2.2.0\examples\peripheral_test
将 peripheral_test 放到 ESP8266_NONOS_SDK-2.2.0根目录，直接编译
1 /* 2 * ESPRESSIF MIT License 3 * 4 * Copyright (c) 2015 <ESPRESSIF SYSTEMS (SHANGHAI) PTE LTD> 5 * 6 * Permission is hereby granted for use on ESPRESSIF SYSTEMS ESP8266 only, in which case, 7 * it is free of charge, to any person obtaining a copy of this software and associated 8 * documentation files (the "Software"), to deal in the Software without restriction, including 9 * without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the Software is furnished 11 * to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in all copies or 14 * substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS 18 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR 19 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER 20 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 22 * 23 */ 24 25 #include "driver/spi_interface.h" 26 #include "eagle_soc.h" 27 #include "osapi.h" 28 29 30 // Show the spi registers. 31 #define SHOWSPIREG(i) __ShowRegValue(__func__, __LINE__); 32 33 /** 34 * @brief Print debug information. 35 * 36 */ 37 void __ShowRegValue(const char * func, uint32_t line) 38 { 39 40 int i; 41 uint32_t regAddr = 0x60000140; // SPI--0x60000240, HSPI--0x60000140; 42 os_printf("\r\n FUNC[%s],line[%d]\r\n", func, line); 43 os_printf(" SPI_ADDR [0x%08x]\r\n", READ_PERI_REG(SPI_ADDR(SpiNum_HSPI))); 44 os_printf(" SPI_CMD [0x%08x]\r\n", READ_PERI_REG(SPI_CMD(SpiNum_HSPI))); 45 os_printf(" SPI_CTRL [0x%08x]\r\n", READ_PERI_REG(SPI_CTRL(SpiNum_HSPI))); 46 os_printf(" SPI_CTRL2 [0x%08x]\r\n", READ_PERI_REG(SPI_CTRL2(SpiNum_HSPI))); 47 os_printf(" SPI_CLOCK [0x%08x]\r\n", READ_PERI_REG(SPI_CLOCK(SpiNum_HSPI))); 48 os_printf(" SPI_RD_STATUS [0x%08x]\r\n", READ_PERI_REG(SPI_RD_STATUS(SpiNum_HSPI))); 49 os_printf(" SPI_WR_STATUS [0x%08x]\r\n", READ_PERI_REG(SPI_WR_STATUS(SpiNum_HSPI))); 50 os_printf(" SPI_USER [0x%08x]\r\n", READ_PERI_REG(SPI_USER(SpiNum_HSPI))); 51 os_printf(" SPI_USER1 [0x%08x]\r\n", READ_PERI_REG(SPI_USER1(SpiNum_HSPI))); 52 os_printf(" SPI_USER2 [0x%08x]\r\n", READ_PERI_REG(SPI_USER2(SpiNum_HSPI))); 53 os_printf(" SPI_PIN [0x%08x]\r\n", READ_PERI_REG(SPI_PIN(SpiNum_HSPI))); 54 os_printf(" SPI_SLAVE [0x%08x]\r\n", READ_PERI_REG(SPI_SLAVE(SpiNum_HSPI))); 55 os_printf(" SPI_SLAVE1 [0x%08x]\r\n", READ_PERI_REG(SPI_SLAVE1(SpiNum_HSPI))); 56 os_printf(" SPI_SLAVE2 [0x%08x]\r\n", READ_PERI_REG(SPI_SLAVE2(SpiNum_HSPI))); 57 58 for (i = 0; i < 16; ++i) { 59 os_printf(" ADDR[0x%08x],Value[0x%08x]\r\n", regAddr, READ_PERI_REG(regAddr)); 60 regAddr += 4; 61 } 62 63 } 64 65 66 // SPI interrupt callback function. 67 void spi_slave_isr_sta(void *para) 68 { 69 uint32 regvalue; 70 uint32 statusW, statusR, counter; 71 if (READ_PERI_REG(0x3ff00020)&BIT4) { 72 //following 3 lines is to clear isr signal 73 CLEAR_PERI_REG_MASK(SPI_SLAVE(SpiNum_SPI), 0x3ff); 74 } else if (READ_PERI_REG(0x3ff00020)&BIT7) { //bit7 is for hspi isr, 75 regvalue = READ_PERI_REG(SPI_SLAVE(SpiNum_HSPI)); 76 os_printf("spi_slave_isr_sta SPI_SLAVE[0x%08x]\n\r", regvalue); 77 SPIIntClear(SpiNum_HSPI); 78 SET_PERI_REG_MASK(SPI_SLAVE(SpiNum_HSPI), SPI_SYNC_RESET); 79 SPIIntClear(SpiNum_HSPI); 80 81 SPIIntEnable(SpiNum_HSPI, SpiIntSrc_WrStaDone 82 | SpiIntSrc_RdStaDone 83 | SpiIntSrc_WrBufDone 84 | SpiIntSrc_RdBufDone); 85 86 if (regvalue & SPI_SLV_WR_BUF_DONE) { 87 // User can get data from the W0~W7 88 os_printf("spi_slave_isr_sta : SPI_SLV_WR_BUF_DONE\n\r"); 89 } else if (regvalue & SPI_SLV_RD_BUF_DONE) { 90 // TO DO 91 os_printf("spi_slave_isr_sta : SPI_SLV_RD_BUF_DONE\n\r"); 92 } 93 if (regvalue & SPI_SLV_RD_STA_DONE) { 94 statusR = READ_PERI_REG(SPI_RD_STATUS(SpiNum_HSPI)); 95 statusW = READ_PERI_REG(SPI_WR_STATUS(SpiNum_HSPI)); 96 os_printf("spi_slave_isr_sta : SPI_SLV_RD_STA_DONE[R=0x%08x,W=0x%08x]\n\r", statusR, statusW); 97 } 98 99 if (regvalue & SPI_SLV_WR_STA_DONE) { 100 statusR = READ_PERI_REG(SPI_RD_STATUS(SpiNum_HSPI)); 101 statusW = READ_PERI_REG(SPI_WR_STATUS(SpiNum_HSPI)); 102 os_printf("spi_slave_isr_sta : SPI_SLV_WR_STA_DONE[R=0x%08x,W=0x%08x]\n\r", statusR, statusW); 103 } 104 if ((regvalue & SPI_TRANS_DONE) && ((regvalue & 0xf) == 0)) { 105 os_printf("spi_slave_isr_sta : SPI_TRANS_DONE\n\r"); 106 107 } 108 SHOWSPIREG(SpiNum_HSPI); 109 } 110 } 111 112 // Test spi master interfaces. 113 void ICACHE_FLASH_ATTR spi_master_test() 114 { 115 SpiAttr hSpiAttr; 116 hSpiAttr.bitOrder = SpiBitOrder_MSBFirst; 117 hSpiAttr.speed = SpiSpeed_10MHz; 118 hSpiAttr.mode = SpiMode_Master; 119 hSpiAttr.subMode = SpiSubMode_0; 120 121 // Init HSPI GPIO 122 WRITE_PERI_REG(PERIPHS_IO_MUX, 0x105); 123 PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDI_U, 2);//configure io to spi mode 124 PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTCK_U, 2);//configure io to spi mode 125 PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTMS_U, 2);//configure io to spi mode 126 PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDO_U, 2);//configure io to spi mode 127 128 SPIInit(SpiNum_HSPI, &hSpiAttr); 129 uint32_t value = 0xD3D4D5D6; 130 uint32_t sendData[8] ={ 0 }; 131 SpiData spiData; 132 133 os_printf("\r\n ============= spi init master ============= \r\n"); 134 135 // Test 8266 slave.Communication format: 1byte command + 1bytes address + x bytes Data. 136 os_printf("\r\n Master send 32 bytes data to slave(8266)\r\n"); 137 os_memset(sendData, 0, sizeof(sendData)); 138 sendData[0] = 0x55565758; 139 sendData[1] = 0x595a5b5c; 140 sendData[2] = 0x5d5e5f60; 141 sendData[3] = 0x61626364; 142 sendData[4] = 0x65666768; 143 sendData[5] = 0x696a6b6c; 144 sendData[6] = 0x6d6e6f70; 145 sendData[7] = 0x71727374; 146 spiData.cmd = MASTER_WRITE_DATA_TO_SLAVE_CMD; 147 spiData.cmdLen = 1; 148 spiData.addr = &value; 149 spiData.addrLen = 4; 150 spiData.data = sendData; 151 spiData.dataLen = 32; 152 SPIMasterSendData(SpiNum_HSPI, &spiData); 153 154 155 os_printf("\r\n Master receive 24 bytes data from slave(8266)\r\n"); 156 spiData.cmd = MASTER_READ_DATA_FROM_SLAVE_CMD; 157 spiData.cmdLen = 1; 158 spiData.addr = &value; 159 spiData.addrLen = 4; 160 spiData.data = sendData; 161 spiData.dataLen = 24; 162 os_memset(sendData, 0, sizeof(sendData)); 163 SPIMasterRecvData(SpiNum_HSPI, &spiData); 164 os_printf(" Recv Slave data0[0x%08x]\r\n", sendData[0]); 165 os_printf(" Recv Slave data1[0x%08x]\r\n", sendData[1]); 166 os_printf(" Recv Slave data2[0x%08x]\r\n", sendData[2]); 167 os_printf(" Recv Slave data3[0x%08x]\r\n", sendData[3]); 168 os_printf(" Recv Slave data4[0x%08x]\r\n", sendData[4]); 169 os_printf(" Recv Slave data5[0x%08x]\r\n", sendData[5]); 170 171 value = SPIMasterRecvStatus(SpiNum_HSPI); 172 os_printf("\r\n Master read slave(8266) status[0x%02x]\r\n", value); 173 174 SPIMasterSendStatus(SpiNum_HSPI, 0x99); 175 os_printf("\r\n Master write status[0x99] to slavue(8266).\r\n"); 176 SHOWSPIREG(SpiNum_HSPI); 177 178 179 // Test others slave.Communication format:0bytes command + 0 bytes address + x bytes Data 180 #if 0 181 os_printf("\r\n Master send 4 bytes data to slave\r\n"); 182 os_memset(sendData, 0, sizeof(sendData)); 183 sendData[0] = 0x2D3E4F50; 184 spiData.cmd = MASTER_WRITE_DATA_TO_SLAVE_CMD; 185 spiData.cmdLen = 0; 186 spiData.addr = &addr; 187 spiData.addrLen = 0; 188 spiData.data = sendData; 189 spiData.dataLen = 4; 190 SPIMasterSendData(SpiNum_HSPI, &spiData); 191 192 os_printf("\r\n Master receive 4 bytes data from slaver\n"); 193 spiData.cmd = MASTER_READ_DATA_FROM_SLAVE_CMD; 194 spiData.cmdLen = 0; 195 spiData.addr = &addr; 196 spiData.addrLen = 0; 197 spiData.data = sendData; 198 spiData.dataLen = 4; 199 os_memset(sendData, 0, sizeof(sendData)); 200 SPIMasterRecvData(SpiNum_HSPI, &spiData); 201 os_printf(" Recv Slave data[0x%08x]\r\n", sendData[0]); 202 #endif 203 204 } 205 206 // Test spi slave interfaces. 207 void ICACHE_FLASH_ATTR spi_slave_test() 208 { 209 // 210 SpiAttr hSpiAttr; 211 hSpiAttr.bitOrder = SpiBitOrder_MSBFirst; 212 hSpiAttr.speed = 0; 213 hSpiAttr.mode = SpiMode_Slave; 214 hSpiAttr.subMode = SpiSubMode_0; 215 216 // Init HSPI GPIO 217 WRITE_PERI_REG(PERIPHS_IO_MUX, 0x105); 218 PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDI_U, 2);//configure io to spi mode 219 PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTCK_U, 2);//configure io to spi mode 220 PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTMS_U, 2);//configure io to spi mode 221 PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDO_U, 2);//configure io to spi mode 222 223 os_printf("\r\n ============= spi init slave =============\r\n"); 224 SPIInit(SpiNum_HSPI, &hSpiAttr); 225 226 // Set spi interrupt information. 227 SpiIntInfo spiInt; 228 spiInt.src = (SpiIntSrc_TransDone 229 | SpiIntSrc_WrStaDone 230 |SpiIntSrc_RdStaDone 231 |SpiIntSrc_WrBufDone 232 |SpiIntSrc_RdBufDone); 233 spiInt.isrFunc = spi_slave_isr_sta; 234 SPIIntCfg(SpiNum_HSPI, &spiInt); 235 // SHOWSPIREG(SpiNum_HSPI); 236 237 SPISlaveRecvData(SpiNum_HSPI); 238 uint32_t sndData[8] = { 0 }; 239 sndData[0] = 0x35343332; 240 sndData[1] = 0x39383736; 241 sndData[2] = 0x3d3c3b3a; 242 sndData[3] = 0x11103f3e; 243 sndData[4] = 0x15141312; 244 sndData[5] = 0x19181716; 245 sndData[6] = 0x1d1c1b1a; 246 sndData[7] = 0x21201f1e; 247 248 SPISlaveSendData(SpiNum_HSPI, sndData, 8); 249 WRITE_PERI_REG(SPI_RD_STATUS(SpiNum_HSPI), 0x8A); 250 WRITE_PERI_REG(SPI_WR_STATUS(SpiNum_HSPI), 0x83); 251 } 252 253 void spi_interface_test(void) 254 { 255 // Test spi interfaces. 256 os_printf("\r\n =======================================================\r\n"); 257 os_printf("\t ESP8266 %s application \n\r", __func__); 258 os_printf("\t\t SDK version:%s \n\r", system_get_sdk_version()); 259 os_printf("\t\t Complie time:%s \n\r", __TIME__); 260 os_printf("\r\n =======================================================\r\n"); 261 262 #if 0 263 spi_master_test(); 264 #else 265 spi_slave_test(); 266 #endif 267 268 }
先看读取：
之前用 N76E003模拟做了一下驱动。。。发送是成功，读取却失败，后面直接上工具....是正常的了 （这里估计要改一下超时时间......）
工具设置如下：
2M
模式0 IDLE 为LOW 第一个上升沿采集
命令参数 0300（03 是读取命令 00 是地址）
读取字节 32
所以一共发送34字节
log如下：
1 spi_slave_isr_sta SPI_SLAVE[0x477603f1] 2 spi_slave_isr_sta : SPI_SLV_RD_BUF_DONE 3 4 FUNC[spi_slave_isr_sta],line[108] 5 SPI_ADDR [0x00000000] 6 SPI_CMD [0x0004a003] 7 SPI_CTRL [0x0028a000] 8 SPI_CTRL2 [0x00800011] 9 SPI_CLOCK [0x00000000] 10 SPI_RD_STATUS [0x0000008a] 11 SPI_WR_STATUS [0x00000000] 12 SPI_USER [0xd1000040] 13 SPI_USER1 [0x1dfeff00] 14 SPI_USER2 [0x70000003] 15 SPI_PIN [0x0008001e] 16 SPI_SLAVE [0x407603e0] 17 SPI_SLAVE1 [0x3aff1c70] 18 SPI_SLAVE2 [0x00000000] 19 ADDR[0x60000140],Value[0x31313131] 20 ADDR[0x60000144],Value[0x31313131] 21 ADDR[0x60000148],Value[0x31313131] 22 ADDR[0x6000014c],Value[0x31313131] 23 ADDR[0x60000150],Value[0x31313131] 24 ADDR[0x60000154],Value[0x31313131] 25 ADDR[0x60000158],Value[0x31313131] 26 ADDR[0x6000015c],Value[0x41414031] 27 ADDR[0x60000160],Value[0x35343332] 28 ADDR[0x60000164],Value[0x39383736] 29 ADDR[0x60000168],Value[0x3d3c3b3a] 30 ADDR[0x6000016c],Value[0x11103f3e] 31 ADDR[0x60000170],Value[0x15141312] 32 ADDR[0x60000174],Value[0x19181716] 33 ADDR[0x60000178],Value[0x1d1c1b1a] 34 ADDR[0x6000017c],Value[0x21201f1e] 35 add 1 36 aid 1 37 station: 82:15:53:ed:20:7c join, AID = 1 38 station: 82:15:53:ed:20:7c leave, AID = 1 39 rm 1
逻辑分析如下
2M，MOSI 先发了03 00 然后32字节的0（直接低电平）
数据完全OK
再看发送的：
2M，MOSI 先发了02 00 然后32字节的数据
log:
1 spi_slave_isr_sta SPI_SLAVE[0x41f403f2] 2 spi_slave_isr_sta : SPI_SLV_WR_BUF_DONE 3 4 FUNC[spi_slave_isr_sta],line[108] 5 SPI_ADDR [0x00000000] 6 SPI_CMD [0x00049002] 7 SPI_CTRL [0x0028a000] 8 SPI_CTRL2 [0x00800011] 9 SPI_CLOCK [0x00000000] 10 SPI_RD_STATUS [0x0000008a] 11 SPI_WR_STATUS [0x00000000] 12 SPI_USER [0xc9000040] 13 SPI_USER1 [0x1dfeff00] 14 SPI_USER2 [0x70000002] 15 SPI_PIN [0x0008001e] 16 SPI_SLAVE [0x407403e0] 17 SPI_SLAVE1 [0x3aff1c70] 18 SPI_SLAVE2 [0x00000000] 19 ADDR[0x60000140],Value[0x31313131] 20 ADDR[0x60000144],Value[0x31313131] 21 ADDR[0x60000148],Value[0x31313131] 22 ADDR[0x6000014c],Value[0x31313131] 23 ADDR[0x60000150],Value[0x31313131] 24 ADDR[0x60000154],Value[0x31313131] 25 ADDR[0x60000158],Value[0x31313131] 26 ADDR[0x6000015c],Value[0x41414031] 27 ADDR[0x60000160],Value[0x35343332] 28 ADDR[0x60000164],Value[0x39383736] 29 ADDR[0x60000168],Value[0x3d3c3b3a] 30 ADDR[0x6000016c],Value[0x11103f3e] 31 ADDR[0x60000170],Value[0x15141312] 32 ADDR[0x60000174],Value[0x19181716] 33 ADDR[0x60000178],Value[0x1d1c1b1a] 34 ADDR[0x6000017c],Value[0x21201f1e]
逻辑分析如下
数据完全对上 OJBK
